iDevOS™ Firmware for itron TU Series SMART TFT Modules
The boot / operating files can be downloaded from this page or via the iDevTFT development platform.
1- boot.bin - boot from 1G SD card
2- newflash.bin - format the internal NAND from 1G SD card
3- nandboot.bin - boot from internal NAND,
4- iuloader.bin - load main firmware to RAM from NAND
5- tuaxxxx.tft - main firmware file where xxxx is the version number
USB Update of Firmware direct from iDevTFT
Please ensure you have the appropriate USB driver loaded on your PC. See the USB page in Hardware for details.
Within the USB Transfer Menu select 'Copy firmware files to NAND flash'.
Select to download updates from the web or apply your specified version.
Connect the TFT module via USB lead and when the 'Itron TFT Module' appears in the port selection, upload the new files.
If USB is not enabled in the existing application, temporarily link pin 3 and pin 4 of CN6 to force the USB port to be enabled at power ON.
Packed Project File Update (.ppf) using SD card or Serial Port
Files 3, 4 and 5 can be deployed in a .ppf Pack Project File created by iDevTFT with application updates.
The .ppf file can be put on a FAT32 formatted 1G SD card or 4G/8G SDHC card and inserted into the SD card holder during power OFF.
At power ON the file is unpacked and copied to the internal NAND. Reboot the system for updates to be used.
Update via USB lead is available using the PPF Send Utility free to deploy from the TOOLS page.
Update via serial port requires the application code to switch from a user protocol to iDevOS protocol. Please consult us for guidance.
Loader Program Update via 4G/8G SDHC card
If you have a FAT32 formatted 4GB or 8GB SDHC Card, create a loader program inside a TUXXXA.mnu file where XXX is 320, 480, 640 or 800 depending on TFT size.
The program should include the following lines.
FPROG;
LOAD(NAND,"SDHC/nandboot.bin");
LOAD(NAND,"SDHC/iuloader.bin");
LOAD(NAND,"SDHC/tuaxxxx.tft"); //xxxx is the version number
//other load other project application files that may require here in the same format as above commands.
FEND;
Copy the TUXXXA.mnu file and all files to be uploaded on to your SDHC card.
Insert the SDHC card, power up and the program will RUN. After loading is complete, remove the card and reboot.
Total Reload and Memory Reformat
For a total reload where NAND corruption may have occurred, all 5 files must be copied to a FAT32 formatted 1G SD card.
No other size of card supports clean boot. If required, 1G SD cards can be purchased from
itron TFT or distributors.
During this process internal NAND flash and EEPROM are reformatted so any application or data files will be removed.
OUTSTANDING ISSUES
TFT Bug
Priority
Expected Date
Details
USB Mouse Protocol
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05 Aug 17
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I tested the attached sample projects and noticed, that mouse can only be moved vertically, so only 1-D. It works OK in simulator, but not on TW-480 module. Please test it. Maybe something like SETUP(USBH_MOUSE) is needed??
It's actually only one particular mouse that's not working properly, a "Buffalo" brand cordless mouse (part of a cordless keyboard + cordless mouse combo), Vendor ID 0x1A81, Product ID 0x1004.
We've analyzed the USB packet data between the iSMART and the mouse.
We've confirmed that the mouse supports the "boot protocol".
The problem seems to be that the iSMART issues a "Set_Protocol" Request with the wValue parameter set to 1 (Report Protocol), instead of 0 (Boot Protocol).
For this particular mouse, the report format (for the first three bytes, at least) for Report Protocol is different to the report format for Boot Protocol. This seems to be the cause of the iSMART mis-interpreting the mouse report data.
I've confirmed that the PC BIOS correctly selects 0 (Boot Protocol).
So I think you may need to fix the iSMART firmware so that 0 (Boot Protocol) is selected instead of 1 (Report Protocol).
In the meantime, mouse support restrictions can be clarified thus:
------------------------------------------------------------ Restrictions: Only HID "boot protocol" mice are supported. Report protocol format must also be compatible with (valid as) boot protocol format. ------------------------------------------------------------
Switching style of vector draw entity
1
19 Jun 14
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The style switching of vector type draw entities does not seem to function.
Problem loading a pointer with a pointer
1
19 Jun 14
Show
Problem using LOAD(ptr > ptr, var)
Writing zero length file to NAND
1
19 Jun 14
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Possible NAND corruption is occuring when attempting to copy a zero length file (mnu type) to NAND from SDHC.
itron SMART TFT Interim Firmware & Bug Fixes
Version No
File
Release Date
Details
TU iDevOS Boot & Firmware V00.49.63 released 29th Jan 2018
1/ options to fit 2 central pins for LCD frame 2/ CN14 now 6 way to allow use of new qtc touch panel 3/increase slot size near CN3 to avoid boxed header 4/more batt in board bu 0.5mm 5/ RFI ground plane improvements
PCB480272D Issue 8; TU480x272C -- K612A1v16
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03 Apr 14
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1/ additional ESD protection on Touch panel 2/ provision for higher current I2C driver 3/ outer chassis ground on top + bottom layers 4/brownout voltage increased from 2V6 to 2V9 5/ option to disconnect LCD frame 0V 6/ option to fix brightness at full and bring PWM out on CN7 7/ RFI improvements
1/ solder blob link option for CN1 pin 10 (J47) (Vin) - to prevent noise down line - OK 2/ 'nand enable' link removed as per DL 3/ solder blob link to usb 5V pin (J48) (default to isolate) - OK 4/ chassis ground ring around pcb edge with 5mm stiching - OK 5/ 4 off pins to locate / secure / ground lcd chassis - OK 6/ crossover for txd0 & 1 etc for linux RS485 half duplex operation - OK Rxd0 defaulted open to prevent contention 7/ CM filter at input and between chassis gnd & 0V - OK 8/ 2 small caps to chassis and overvoltage protection zener directly after fuse. - OK 9/ remove R21 (usb shield) & replace with solder blob link - OK
Caps around LCD 1nF 10nF 100nF Add additional 3 ground pads for lcd screen connection Caps around 3V3 reg - remove links and replace with caps Add additional grounds for cpu if possible Remove defualt link to chassis Add additional lcd grounding points cap arrays - group arrays for i2c and async individual caps for i2c change to individual caps on backside for ac97 clock common mode filter at input on underside RN4 & RN5 on back of module for easy removal Added 2 caps to bottom side vddana (cpu side of inductor) Added 3 caps to bottom side vddplla very close to pin Added extra cap on back close to vddcore pin B10 Added 2 caps on back to vddiom R8 R12 Moved caps etc away from connectors on underside
PCBs to be built with 2 'layer' orders Normal 123456 (TOP,GND,3V3,LB,MB,BOT) Alternative ABCDEF (TOP,GND,MB,LB,3V3,BOT) 4 only
1/ Voltage selections links for CN3, CN4 reversed to be same as PCB480272A Issue 8A 2/ Ferrite reset array inline on RS485 lines 3/ New connector added 5W buch panel / analogue inputs if standard touch panel is not used. 4/ Link options for LCD panels with 20/40mA backlight currents. 5/ USB functionality defaulted by copper link on J21 A
1/ Voltage selections links for CN3, CN4 reversed 2/ Revised PCB layout for new TFT. 3/Touch panel connection not separate anymore 4/ Fuse relocated to top left of board 5/ USB functionality defaulted by copper link on J21 A
1/ External watchdog turns 3V3 rail off 2/ Implement noise reduction, routing, caps, layers for improved USB & reduced emissions 3/ Backlight circuit changed from regulated voltage to constant current 4/ Default copper bridges on link options for most common selections 5/ Voltage selections (5V/3V3) links added for CN3, CN4 6/ Fuse relocated from under LCD 7/ I²C buffers added to rear of PCB - very limited use due to voltage threshold levels. 8/ USB functionality defaulted by copper link on J21 D
1/ Port changes to KBD Conn for more functionality 2/ J14 (D16-D31 data bus) removed to allow NAND memory to go on top side 3/ Debug port changed from RS232 levels to TTL levels 4/ RS232 handshake lines reduced & RS485 now possible at same time as RS232 5/ Silk screen ident added to rear of PCB
1/ Link options to connect/disconnect LCD frame to ground 2/ Ground planes on top+bottom layer connected to chassis ground rather than signal ground, hence signal ground is 'inside' chassis ground 3/ ESD diode arrat on touch connections 4/ New link J51 allows CN1 pin 10 to be connected into 10-24V connector 5/ Touch panel connector moved to back side of PCB 6/ Watchdog brown-out voltage changed from 2V6 to 2V9 7/ Filter components + peripheral IC's grounded to chassis ground 8/ Layer order changed to 1-top 2-gnd 3-MB 4-LB 5-3V3 6-bottom
1/ Additional decoupling capacitors for improved EMC results 2/ Connector for direct connection to capacitive touch panel 3/ Chassis connection detached from 0V
1/ Major PCB layout change (similar to 480) 2/ 6 layer PCB 3/ Single LCD Connector for 800 & 640 4/ RC filters on I/O lines 5/ Conn for detached 24-5V dc-dc PSU 6/ Touch panel connectors 7/ Bigger battery 8/ Alternative BL inductor on back of PCB (income of interference with cap touch panel)
1/ Gnd Layer 2 (4 Layer) 2/ PCA9306 buffer option on I2C & Async 3/ Series resistor on RS232 lines 4/ Additional decoupling capacitors for reduced Radio Frequency Interference
1/ Ground layer 2 2/ USB tracking revised, increase decoupling capacitors on CPU 3/ Reset now removes 3V3 for better reset 4/ PCB has ability to build 10-24Vdc-dc on reverse side 5/ 3V3 / 5V option on CN3/CN4
