|
Selecting a Noritake Itron VFD Module |
  |
|
| 1 | key factors | |
| 2 | module construction | |
| 3 | power supply requirements | |
| 4 | communication interfaces | |
| 5 | module reset | |
| 6 | software commands | |
| 7 | character sets | |
| 8 | design precautions | |
| 9 | trouble shooting | |
| service & warranty | ||
| view module function comparison table | ||
| custom design modules | ||
| 3 power supply requirements | |
|
Most modules operate from a
single 5VDC supply. The exceptions are for specific applications in point
of sale and amusement equipment where 12VDC is the typical supply voltage.
Custom modules have been designed with wide operating capability of 10 to
36VDC for transportation applications. It is important that the power source has a fast rise time and can supply the in rush current where a transformer is used in the DC/DC converter. This can be twice the nominal operating current. Recent designs use a power supply control IC with fixed frequency and soft start. Transformer-less modules have the advantage of being able to start irrespective of how slow the rise time. Particular care should be taken when the module has a separate supply from the host due current flow in the signal/data lines causing incorrect initialisation. |
|
| 4 communication interfaces | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| The following table lists many
popular interfaces used by host systems with their key attributes. A common 0V ground connection is required between host and module except for USB and RS485. |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 4.1 synchronous serial interfaces | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| A clock signal output by the
host system provides a synchronizing reference for communicating data bits
on a separate data input/output. The data should be stable on either
rising edge or falling edge of the clock waveform depending on the system
protocol. Since synchronous communication can easily be corrupted by
noise, a reset signal is used prior to critical events to ensure both host
and module are co-ordinated.
A 'clock serial' interface is the simplest
method with single direction 'send' data to module. An additional signal
line C/D may be used for command and data register selection. |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
 |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 4.2 asynchronous serial interfaces | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Communication is achieved by
initiating a change of state in the data signal (start bit) followed by 8
fixed frequency periods (baud rate) for the synchronized transmission of
data. This enables a 2 wire solution for many applications with inherent
re-synchronization after each 8 bit data byte. Transmission between host and module can be made at CMOS/TTL logic voltage levels over distances up to 0.5 metre. The idle state is logic high with data rates upto 115K bits per second. Greater distance is achieved using RS232 voltage levels (+/-12volts) or a differential system like RS485 which uses two signal wires where the logic level is dependent on the polarity of the wires. After each data byte, a period is required to allow the module time to process the received data. A hardware control line can be used to indicate to the host that the module is busy. In certain modules an XOFF (13H) character is transmitted to the host to indicate the receive buffer is full. When ready, the module sends the character XON (11H). |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
 |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 4.3 parallel interfaces | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| The conventional CPU distributed
data method uses a parallel 8 bit data bus. Two bus configurations evolved
to provide data transfer control which are known as M68 bus and i80
bus. The M68 bus has an (E)nable clock signal and a direction control signal (R/W). The i80 bus has a separate (/WR) signal for controlling the sending of data and (/RD) for receiving data. Many modules allow either data bus to be connected by configuring a jumper link on the module PCB. Additionally, one of the CPU address lines
(A0 through to A15) can be used to select different data registers inside
the module via the Rs, C/D or A0 input. This allows many additional
display functions to be performed with a single command byte. |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
 |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 4.4 other interfaces | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Wireless, Ethernet and Optical interfaces have evolved for messaging applications. Interface modules are available in the market to convert these interfaces to RS232. |
 5 module reset power on reset |
| When power is applied to the display module, an internal reset circuit ensures the internal micro-controller or ASIC initializes correctly. The host system should allow at least 100ms before sending data to the module. |
| hardware reset |
| Modules with a hardware reset allow the host system to restart the initialization sequence to ensure system integrity. The specification will define the period which should be allowed before data is transmitted. |
| 6 software commands | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
The extent of the software commands in a
module will determine it's flexibility to show data efficiently. Cost constraints can restrict the commands available. |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 6.1 character display commands | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| T series - standard ASCII | U series - LCD compatible | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 6.2 graphic display commands | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
GU-K6xxx4 series
|
GU-3000 series
|
GU-7000
series
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
GU-800 series
|
|
|
|
| 7 character sets | |
|
The
module specification will define the included fonts in a matrix table
having the high and low order hexadecimal nibbles on the axis. Capital 'A'
= 40 + 01 = 41Hex ASCII Standard upper and lower case alphabet and numeric characters are defined by the American Standard Code for Information Interchange (ASCII) and have character codes between 20Hex and 7FHex. Maintaining the same code for all equipments ensures that most text messages will be interpreted correctly. The symbolic characters are often modified to suit design requirements. european These European characters extend local country requirements. katakana Katakana allows the phonetic representation of spoken Japanese words. This is used in 5x7 dot character displays where the display resolution or memory capability is limited. other fonts The remaining codes are often filled with a range of scientific or potentially useful fonts. |
 |
| font table in the CU - U series | |
| variable sized characters | |
| Graphic displays offer the capability to enhance important information in a larger format. This can be achieved by selecting a larger font, scaling the existing font or down loading a user defined graphic image where the appropriate commands permit. | |
| user defined and additional fonts | |
| Many modules provide internal RAM or EEPROM for the user to upload fonts or graphic icons specific to their application. A typical 5x7 character requires 5 data bytes of 8 bits to define the dot pattern. When a bit is set to '1' the related dot will illuminate. The module specification will have a dot assignment table indicating to which bits of the 5 bytes the dots are assigned. The following links provide a arrange of fonts for various micro-controllers which the user can cut and paste into their application software. Hyperlinks: 8051 AVR PIC16C62 H8 | |
|
|
| 8 precautions |
| 8.1 design |
| Electrical - Power supply voltage operates
at the typical level. Connection - Keep cable lengths as short as possible Mounting - Low mechanical stress applied to PCB. |
| 8.2 handling |
| Anti-Static Handling - Do not touch the
module without anti-static precautions being taken. Assembling - Do not apply undue stress to the module while fixing or connecting. Connection with Power Off - Do not connect or disconnect the data cable or the power supply when ON. |
| 9 trouble shooting |
| 9.1 no illumination |
| Blown Fuse CP1/FS1 - Reverse or intermittent
connection of PSU. VFD Glass Broken - Loss of vacuum causing the getter on the face glass to turn white. Initialization - Incorrect or corrupted command sequence. PSU - Insufficient current capacity in power supply. Damage - PCB or Interface. |
| 9.2 missing or incorrect characters |
| Interface - Miss match in timing or logic
threshold levels. Noise - Induced false trigger of clock or enable signal. VFD Driver - Short circuit to VFD lead pin or drive IC failure |